Location: Austin, TX
Company: Intel
using the most advanced and innovative process technologies. If you are looking to grow and develop your skillsets while be surrounded by highly motivated and knowledge teammates, then this is the organization for you. E-Core CPUs are the industry leading performance per watt CPU that helps: Power the latest Intel 14th Generation laptops, desktops and high-end gaming platforms Drive 5G communications by serving as the base-station that delivers essential data from your electronic devices across the world at maximum bandwidth Create Artificial Intelligence (AI) and machine learning devices Enables a full virtual learning experience for students using the latest Google Chromebooks As a CAD Physical
Design Engineer in the E-core CPU group, you will be responsible for Developing, debugging, and supporting tools, flows and methodologies covering backend physical design methodologies and flow automation for high performance blocks and full chip level using RTL2GDS standard cell level design techniques Performing analysis of either synthesis, place and route, floorplanning or signoff for static timing analysis on timing paths, formal equivalence verification, power consumption, electrical rule checking and circuit reliability to identify key issues Working closely with design teams to understand and debug tool issues and constraints Working with industry EDA vendors to build and enhance tool
capabilities to design a high-speed, low-power synthesizable CPU.
Creating documentation and help with guidelines/specs This position will report to Austin, Texas to work at Intel's Texas Design Center The candidate should possess the attributes below: Communicate with other team members to solve problems and following solutions through to completion Excellent verbal and written English communication skills Qualifications What we need to see (Minimum Qualifications): Master's degree in Computer Engineering and/or Electrical Engineering OR Ph D degree in Computer Engineering and/or Electrical Engineering OR Bachelor's degree in Computer Engineering and/or Electrical Engineering and 2+ years of relevant working experience Coursework and/or 3+ months experience in VLSI, design automation algorithms, and transistor-level design Coursework and/or 3+ months experience using industry standard Engineering Design Automation (EDA) VLSI tools/flows from Synopsys, Cadence and/or Mentor Graphics for performing synthesis, place-and-route, extraction, timing/power analysis and functional verification.
1+ years' experience with Python, Perl, and/or Tcl scripting languages. How to Stand out (Preferred Qualifications) : 1 or more years of relevant working experience in microprocessor or other high speed design backend design.
Experience with timing closure methodology for worst-case corner (static timing analysis / STA, statistical variation analysis, spice circuit simulation, ERC, noise analysis flows, cross talk, OCV effects, budget constraints) Proficient in VLSI transistor-level design concepts, such as dynamic circuit techniques and memories, circuit modeling, including SPICE modeling and worst-case corner. Physical design knowledge of device physics and in particular aspects which impact Tapeout experience on deep sub-micron Fin FET technology nodes (7nm and below), resolving timing challenges, multi-corner and multimode timing closure.
Proficiency in EDA tools such as Fusion Compiler, Prime Time, Prime Power, Nano Time, Prime Sim, Spectre, and/or Solido on high-performance So C or microprocessor designs. Inside this Business Group In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel's products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore's Law and groundbreaking innovations.
DEG is Intel's engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner. Posting Statement All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, interaction, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, interactionual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. Working Model This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs. Requisition #: JR0254136pca3lyuhf
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